Taiwan’s TSMC could expand to Japan, a report claims

More than six months ago, we reported that a Japanese consortium wanted to challenge TSMC and Samsung by producing chips using a 2nm process node by 2027.

Now there is an exclusive Reuters report claiming that TSMC is considering expansion in Japan.

TSMC, supplier of Apple silicon chips for iPhone and iPad, could build advanced packaging capacity in Japan, according to two sources familiar with the matter.

“One option the chipmaking giant is considering is bringing its wafer-on-substrate (CoWoS) chip packaging technology to Japan, according to one of the sources who has been briefed on the matter,” it reads. read in the report.

Chip on Wafer on Substrate (CoWoS) packaging technology is a method used in creating electronic circuits in which several chips are first mounted on a semiconductor wafer, then the assembly is attached to a larger substrate. This technique enables high-density integration of chips, enabling the creation of more compact and efficient electronic devices. The process involves stacking the chips vertically and connecting them to each other and to the substrate below.

It's like building a mini skyscraper on a tiny plot of land. This method allows you to fit a lot more power into a small space, much like stacking apartments to get the most out of a small plot of land in a city. It's a smart way to make electronic devices smaller, faster and more efficient.

Currently, all of TSMC's CoWoS capacity is in Taiwan.

Demand for advanced semiconductor packaging has increased globally alongside the boom in artificial intelligence, prompting chipmakers including TSMC, Samsung Electronics and Intel to increase capacity.

TSMC said it plans additional advanced packaging capacity in Chiayi, southern Taiwan, to meet strong market demand.