Intel will bring a performance-improving feature to its chips one year ahead of TSMC

Intel will bring a performance-improving feature to its chips one year ahead of TSMC،

In October 2021, Intel CEO Pat Gelsinger stated that Intel would take over process leadership from TSMC and Samsung Foundry by 2025. Intel seeks to challenge TSMC and Samsung Foundry in the contract foundry segment of the 'industry. A contract foundry takes chip designs from fabless chip designers (fabless means they don't own a manufacturing facility, like Apple for example) and makes the chip. TSMC is the world leader followed by Samsung Foundry.

Currently, TSMC and Samsung Foundry are shipping 3nm chips, and in the second half of next year, both could mass produce 2nm chips. Later this year, according to The motley fool, Intel will use its 20A process (equivalent to 2nm for TSMC and Samsung Foundry) which will be used to build Intel's Arrow Lake PC chips. So at this point Intel will have the process leadership and that will only continue next year when Intel launches its 18A process node, equivalent to 1.8nm when you compare it to TSMC and Samsung Foundry. The latter two will launch their 2nm node in the second half of next year.

Intel's process nodes will increase from 20A this year to 14A by 2027

Everyone should catch up in 2027 when Intel's 14A (1.4nm) joins TSMC and Samsung Foundry's 1.4nm output. The bottom line is that the size of the transistors used with these chips decreases as the process node shrinks. This means that more transistors can be inserted into a component. The more transistors there are inside a chip, generally the more powerful and/or energy efficient it is.

Intel will launch its 18A process node next year

But starting with its 20A production later this year, Intel will have a head start on TSMC and Samsung Foundry with a key feature the US chipmaker calls PowerVia (also known as backside power delivery). TSMC is expected to use this technology with its N2P node which it will use starting in 2026. Samsung Foundry is expected to use rear power on a particular node launching next year, although Samsung Foundry has not confirmed this.

So, what is PowerVia? Most of the small wires that power a chip sit on top of all the layers that make up a silicon component. As these chips become more powerful and complex, the top wires that connect to the power sources compete with the wires that connect the components. This leads to wasted energy and low efficiency.

PowerVia moves the wires powering the chips to the back of the chip. As a result, clock speeds can increase by 6%, resulting in better performance. Add to that the performance increase gained from using a more advanced process node, and the result is a more powerful chip used to run a more powerful device.

Intel First to Take Delivery of Its High-NA Extreme Ultraviolet Lithography Machine

Intel CEO Gelsinger said: “I bet the whole company on 18A. » Intel expects the performance and efficiency of its 18A node to be higher than that of TSMC. Intel also signed an agreement with Arm allowing Arm's chip design customers to build low-power SoCs using Intel's 18A process node. Last month, Intel agreed to build a custom chip for Microsoft using its 18A process. Four large, unnamed companies (it's unclear if Microsoft is one of the four) have signed on for Intel to produce their chips using the 18A process.

Older EUV machines have an aperture of 0.33 (equivalent to 13nm resolution) and High-NA machines have an aperture of 0.55 (equivalent to 8nm resolution). With a higher resolution pattern transferred onto one wafer, the foundry could avoid having to run a wafer through the EUV machine twice to add additional features, saving both time and money. While TSMC and Samsung Foundry have both ordered one of the High-NA machines from ASML, Intel will likely be able to use the time-saving lithography machine first.