Google joins Qualcomm on a quest for “low power, high performance” RISC-V chip for Wear OS،
RISC-V chips are rarely mentioned, but that could change with Google’s latest collaboration with Qualcomm. Now, the two leading companies are joining forces to develop a “RISC-V Snapdragon Wear Platform that will power next-generation Wear OS solutions.”
RISC-V (pronounced “risk five”) is an open standard instruction set architecture and unlike most other ISA designs, RISC-V is provided under royalty-free open source licenses. Basically, it’s an open source alternative to ARM and x86 (via 9to5Google).
The Google-Qualcomm cooperation was announced on the official Qualcomm website and highlights that this is how competition and innovation will thrive:
As an open source instruction set architecture (ISA), RISC-V encourages innovation by allowing any company to develop fully custom cores. This allows more companies to enter the market, which creates increased innovation and competition. The openness, flexibility and scalability of RISC-V benefit the entire value chain: from silicon suppliers to OEMs, end devices and consumers.
They are actively working on the portable RISC-V solution, but the commercial launch date of the product has not yet been communicated – the timeline will be disclosed at a later date.
“This expanded framework will help pave the way for more products within the ecosystem to take advantage of low-power, high-performance custom processors.” In the meantime, companies will continue to invest in Snapdragon Wear platforms as the primary provider of smartwatch silicon for the Wear OS ecosystem,” Qualcomm executives point out.
Apple almost tried RISC-V
In fall 2021, there were hints that Apple was moving towards RISC-V. The Cupertino company posted a vacancy for someone with “detailed knowledge of RISC-V” but hasn’t said much about the open source architecture since. They continue to rely on ARM’s architecture and continue to pay royalties.
According to ARM, “RISC delivers high performance per watt for battery-powered devices where power efficiency is essential…for chip designers, RISC processors simplify the design and deployment process and deliver lower cost per chip lower due to the smaller components required. Due to the reduced instruction set and simple decoding logic, less chip space is used, fewer transistors are needed, and more versatile registers can fit into the central processing unit.”
